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Käesolev taimerite teek katab suure osa ATmega128 taimerite funktsionaalsusest. Kuna AVR taimerid on erinevate kiipide vahel päris erinevad, siis ei saa nende kasutamiseks kirjutada universaalseid funktsioone. Ka kirjeldatavad ATmega128 funktsioonid on suures osas lihtsalt primitiivsed registri muutmise või lugemise funktsioonid, kuid siiski on nad loetavamad kui registrid.
Näites seadistatakse taimer 0 tavalisse loendamise režiimi ja lubatakse ületäitumise katkestus.
#include <homelab/timer.h> #include <avr/interrupt.h> // Katkestuse programmilõik ISR(TIMER0_OVF_vect) { } int main(void) { // Taimer 0 normaalrežiimi, taktijagur 32 timer0_init_normal(TIMER0_PRESCALE_32); // Taimer 0 ületäitumise katkestuse lubamine timer0_overflow_interrupt_enable(true); // Globaalne katkestuse lubamine sei(); }
#include <avr/io.h> #include "bit.h" typedef enum { TIMER0_NO_PRESCALE = 0x01, TIMER0_PRESCALE_8 = 0x02, TIMER0_PRESCALE_32 = 0x03, TIMER0_PRESCALE_64 = 0x04, TIMER0_PRESCALE_128 = 0x05, TIMER0_PRESCALE_256 = 0x06, TIMER0_PRESCALE_1024 = 0x07 } timer0_prescale; typedef enum { TIMER1_NO_PRESCALE = 0x01, TIMER1_PRESCALE_8 = 0x02, TIMER1_PRESCALE_64 = 0x03, TIMER1_PRESCALE_256 = 0x04, TIMER1_PRESCALE_1024 = 0x05, TIMER1_PRESCALE_T1_FALLING = 0x06, TIMER1_PRESCALE_T1_RISING = 0x07 } timer1_prescale; typedef enum { TIMER1_CTC_TOP_OCRA = 0x04, TIMER1_CTC_TOP_ICR = 0x0C, } timer1_ctc_top; typedef enum { TIMER1_FAST_PWM_TOP_256 = 0x01, TIMER1_FAST_PWM_TOP_512 = 0x02, TIMER1_FAST_PWM_TOP_1024 = 0x03, TIMER1_FAST_PWM_TOP_ICR = 0x0E, TIMER1_PAST_PWM_TOP_OCRA = 0x0F, } timer1_fast_pwm_top; typedef enum { TIMER1_FAST_PWM_OUTPUT_DISABLE = 0x00, TIMER1_FAST_PWM_OUTPUT_TOGGLE_ON_MATCH = 0x01, TIMER1_FAST_PWM_OUTPUT_CLEAR_ON_MATCH = 0x02, TIMER1_FAST_PWM_OUTPUT_SET_ON_MATCH = 0x03, } \ timer1_fast_pwm_output_mode; inline void timer0_init_normal(timer0_prescale prescale) { TCCR0 = prescale & 0x07; } inline void timer0_stop() { TCCR0 = 0x00; } inline unsigned char timer0_get_value(void) { return TCNT0; } inline void timer0_set_value(unsigned char value) { TCNT0 = value; } inline void timer0_overflow_interrupt_enable(bool enable) { bit_set_to(TIMSK, TOIE0, enable); } inline bool timer0_overflow_flag_is_set(void) { return (bit_is_set(TIFR, TOV0) ? 1 : 0); } inline void timer0_overflow_flag_clear(void) { bit_set(TIFR, TOV0); } inline void timer1_init_normal(timer1_prescale prescale) { TCCR1A = 0x00; TCCR1B = (prescale & 0x07); TCCR1C = 0x00; } inline void timer1_init_ctc(timer1_prescale prescale, timer1_ctc_top top) { TCCR1A = (top & 0x03); TCCR1B = ((top & 0x0C) << 1) | (prescale & 0x07); TCCR1C = 0x00; } inline void timer1_init_fast_pwm( timer1_prescale prescale, timer1_fast_pwm_top top, timer1_fast_pwm_output_mode output_a, timer1_fast_pwm_output_mode output_b, timer1_fast_pwm_output_mode output_c) { TCCR1A = ((output_a & 0x03) << 6) | ((output_b & 0x03) << 4) | ((output_c & 0x03) << 2) | (top & 0x03); \ TCCR1B = ((top & 0x0C) << 1) | (prescale & 0x07); TCCR1C = 0x00; } inline void timer1_stop() { TCCR1A = 0x00; TCCR1B = 0x00; TCCR1C = 0x00; } inline unsigned short timer1_get_value(void) { return TCNT1; } inline void timer1_set_value(unsigned short value) { TCNT1 = value; } inline unsigned short timer1_get_compare_match_unitA_value(void) { return OCR1A; } inline unsigned short timer1_get_compare_match_unitB_value(void) { return OCR1B; } inline unsigned short timer1_get_compare_match_unitC_value(void) { return OCR1C; } inline void timer1_set_compare_match_unitA_value(unsigned short value) { OCR1A = value; } inline void timer1_set_compare_match_unitB_value(unsigned short value) { OCR1B = value; } inline void timer1_set_compare_match_unitC_value(unsigned short value) { OCR1C = value; } inline unsigned short timer1_get_input_capture_value(void) { return ICR1; } inline void timer1_set_input_capture_value(unsigned short value) { ICR1 = value; } inline void timer1_overflow_interrupt_enable(bool enable) { bit_set_to(TIMSK, TOIE1, enable); } inline void timer1_compare_match_unitA_interrupt_enable(bool enable) { bit_set_to(TIMSK, OCIE1A, enable); } inline void timer1_compare_match_unitB_interrupt_enable(bool enable) { bit_set_to(TIMSK, OCIE1B, enable); } inline void timer1_compare_match_unitC_interrupt_enable(bool enable) { bit_set_to(TIMSK, OCIE1C, enable); } inline void timer1_input_capture_interrupt_enable(bool enable) { bit_set_to(TIMSK, TICIE1, enable); } inline bool timer1_overflow_flag_is_set(void) { return (bit_is_set(TIFR, TOV1) ? true : false); } inline void timer1_overflow_flag_clear(void) { bit_set(TIFR, TOV1); } inline bool timer1_input_capture_flag_is_set(void) { return (bit_is_set(TIFR, ICF1) ? true : false); } inline void timer1_input_capture_flag_clear(void) { bit_set(TIFR, ICF1); }