Addressing Modes

The ARMv8 has simple addressing modes based on load and store principles. ARM cores perform Arithmetic Logic Unit (ALU) operations only on registers. The only supported memory operations are the load (which reads data from memory into registers) or store (which writes data from registers to memory). By use of LDR/STR instructions and their available options, all the data must be loaded in the general-purpose registers before the operations on them can be performed. Multiple addressing modes can be used for load and store instructions:

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Register addressing

The register is used to store the address of the data in the memory. Or the data will be stored in the memory at the address given in the register. LDR R0, [R1] @ fill the register R0 with the data located at address stored in R1 register STR R1, [R2] @ store the content for register R1 into the memory at location given in the R2 register

Pre-indexed addressing

An offset to the base register is added before the memory access. The address is calculated by adding two registers together: [R1, R2] will result in R1+R2. The register R1 stands for the base register, and R2 stands for the offset. The offset value can also be negative, but the final, calculated address must be a positive value. LDR R0, [R1, R2] @ address pointed to by R1 + R2 STR R2, [R4, R3] @ address pointed to by R4 + R3 The LDR instruction machine code also allows a shift operation to the offset register while maintaining the same addressing mode. LDR R0, [R1, R2, LSL #2] @ address is R1 + (R2*4)

Pre-indexed addressing with write back

The ARM separates this addressing mode because the register that points to the address in memory can now be modified. The value will be added to the register before the access is performed. LDR R0, [R1, #32]! @ read R0 from address pointed to by R1+32, then R1=R1 + 32 The exclamation mark at the end of the closing bracket indicates that the value of the register R1 must be increased by 32. After that, the memory access can be performed.

Post-index with write back

Like with the previous addressing mode, this one is also separated. Like the addressing mode says, ‘post’ means that the value of the register will be increased after performing the memory access. LDR R0, [R1], #32 @ read R0 from address pointed to by R1, then R1=R1 + 32

Other addressing modes

There are some other addressing modes available. Some addressing modes are used just for function or procedure calls, others may combine previously described addressing modes and so on. This subsection will introduce some of the other available addressing modes. • Register to register, also called register direct addressing mode. It is used to copy the data from one register to another register. No memory access is performed with such operations. • Literal addressing, alternatively, the immediate addressing mode is used to identify the data directly in the instruction. • PC-relative addressing

Complex addressing modes

This is not a real addressing mode, but some instructions give possibility to make the addressing a bit complex.

en/multiasm/paarm/chapter_5_5.txt · Last modified: 2025/05/29 08:56 by eriks.klavins
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