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| en:iot-open:hardware2:esp32h [2023/11/18 15:29] – pczekalski | en:iot-open:hardware2:esp32h [2024/05/27 11:09] (current) – [ESP32-H2] pczekalski | ||
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| ======ESP32-Hx Family====== | ======ESP32-Hx Family====== | ||
| - | + | {{: | |
| - | ===ESP32-H3=== | + | =====ESP32-H2===== |
| ==ESP32-H2 General Information== | ==ESP32-H2 General Information== | ||
| Line 17: | Line 17: | ||
| **Wireless connectivity** | **Wireless connectivity** | ||
| - | * **Bluetooth: | + | * **Bluetooth: |
| - | * ** 802.15.4-2015: | + | * ** 802.15.4-2015: |
| **Memory: Internal memory** | **Memory: Internal memory** | ||
| - | * **Embedded flash** | + | * **Embedded flash** |
| - | * **ROM:** 128 kB (for booting and core functions). | + | * **ROM:** 128 kB (for booting and core functions), |
| - | * **SRAM:** 320 kB (for data and instructions). | + | * **SRAM:** 320 kB (for data and instructions), |
| - | * **LP memory:** 4 KB of SRAM that can be accessed by the CPU. It can retain data in deep sleep mode | + | * **LP memory:** 4 KB of SRAM that can be accessed by the CPU. It can retain data in deep sleep mode, |
| - | * ** eFuse ** - 4 Kbit: 1792 bits are reserved for user data, such as encryption key and device ID | + | * ** eFuse ** - 4 Kbit: 1792 bits are reserved for user data, such as encryption key and device ID. |
| **Peripheral Input/ | **Peripheral Input/ | ||
| - | * 19 x GPIO | + | * 19 x GPIO, |
| * 2 x 12-bit ADCs (analog-to-digital converter) up to 5 channels, | * 2 x 12-bit ADCs (analog-to-digital converter) up to 5 channels, | ||
| - | * Internal temperature sensor. | + | * Internal temperature sensor, |
| * 3 × SPI (Serial Peripheral Interface), | * 3 × SPI (Serial Peripheral Interface), | ||
| * 2 x UART (universal asynchronous receiver/ | * 2 x UART (universal asynchronous receiver/ | ||
| Line 43: | Line 43: | ||
| **Security** | **Security** | ||
| - | * Secure boot. | + | * Secure boot, |
| - | * Flash encryption. | + | * Flash encryption, |
| - | * 4096-bit OTP, up to 1792-bit for customers. | + | * 4096-bit OTP, up to 1792-bit for customers, |
| * Cryptographic hardware acceleration: | * Cryptographic hardware acceleration: | ||
| * AES-128/ | * AES-128/ | ||
| Line 51: | Line 51: | ||
| * RSA accelerator 3072 bit, | * RSA accelerator 3072 bit, | ||
| * random number generator (RNG), | * random number generator (RNG), | ||
| - | * digital signature | + | * digital signature. |
| <note important> | <note important> | ||
| Line 58: | Line 58: | ||
| <figure esp32h2_functions> | <figure esp32h2_functions> | ||
| - | {{ : | + | {{ : |
| - | < | + | < |
| </ | </ | ||
| Line 67: | Line 67: | ||
| <figure esp32h2_devkitm> | <figure esp32h2_devkitm> | ||
| - | {{ : | + | {{ : |
| < | < | ||
| </ | </ | ||
