Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revisionPrevious revision
Next revision
Previous revision
en:iot-open:hardware2:esp32h [2023/11/18 15:29] pczekalskien:iot-open:hardware2:esp32h [2024/05/27 11:09] (current) – [ESP32-H2] pczekalski
Line 1: Line 1:
 ======ESP32-Hx Family====== ======ESP32-Hx Family======
- +{{:en:iot-open:czapka_b.png?50| General audience classification icon }}{{:en:iot-open:czapka_e.png?50| General audience classification icon }}\\ 
-===ESP32-H3===+=====ESP32-H2=====
  
 ==ESP32-H2 General Information== ==ESP32-H2 General Information==
Line 17: Line 17:
  
 **Wireless connectivity**  **Wireless connectivity** 
-    * **Bluetooth:** v5.0 Bluetooth Low Energy (BLE) ( speed: 125 Kbps - 2 Mbps) +    * **Bluetooth:** v5.0 Bluetooth Low Energy (BLE) ( speed: 125 Kbps - 2 Mbps), 
-    * ** 802.15.4-2015: ** up to 250 kbps; stacks include Thread 1.3, Zigbee 3.0, Matter, HomeKit, MQTT+    * ** 802.15.4-2015: ** up to 250 kbps; stacks include Thread 1.3, Zigbee 3.0, Matter, HomeKit, MQTT.
  
 **Memory: Internal memory**  **Memory: Internal memory** 
-      * **Embedded flash**  2 or 4 MB  +      * **Embedded flash**  2 or 4 MB 
-      * **ROM:** 128 kB (for booting and core functions). +      * **ROM:** 128 kB (for booting and core functions), 
-      * **SRAM:** 320 kB (for data and instructions). +      * **SRAM:** 320 kB (for data and instructions), 
-      * **LP memory:** 4 KB of SRAM that can be accessed by the CPU. It can retain data in deep sleep mode +      * **LP memory:** 4 KB of SRAM that can be accessed by the CPU. It can retain data in deep sleep mode, 
-      * ** eFuse ** - 4 Kbit: 1792 bits are reserved for user data, such as encryption key and device ID+      * ** eFuse ** - 4 Kbit: 1792 bits are reserved for user data, such as encryption key and device ID.
  
 **Peripheral Input/Output**  **Peripheral Input/Output** 
-    * 19 x GPIO+    * 19 x GPIO,
     * 2 x 12-bit ADCs (analog-to-digital converter) up to 5 channels,     * 2 x 12-bit ADCs (analog-to-digital converter) up to 5 channels,
-    * Internal temperature sensor.+    * Internal temperature sensor,
     * 3 × SPI (Serial Peripheral Interface),      * 3 × SPI (Serial Peripheral Interface), 
     * 2 x UART (universal asynchronous receiver/transmitter),     * 2 x UART (universal asynchronous receiver/transmitter),
Line 43: Line 43:
  
 **Security**  **Security** 
-    *  Secure boot. +    *  Secure boot, 
-    *  Flash encryption. +    *  Flash encryption, 
-    *  4096-bit OTP, up to 1792-bit for customers.+    *  4096-bit OTP, up to 1792-bit for customers,
     *  Cryptographic hardware acceleration:     *  Cryptographic hardware acceleration:
       * AES-128/256,        * AES-128/256, 
Line 51: Line 51:
       * RSA accelerator 3072 bit,        * RSA accelerator 3072 bit, 
       * random number generator (RNG),       * random number generator (RNG),
-      * digital signature+      * digital signature.
  
 <note important>  <note important> 
Line 58: Line 58:
  
 <figure esp32h2_functions> <figure esp32h2_functions>
-{{ :en:iot-open:hardware2:esp32h2block.jpg?nolink&400 |}} +{{ :en:iot-open:hardware2:esp32h2block.jpg?400 | ESP32-H2 functional block diagram}} 
-<caption>ESP32-H2 functional block diagram </caption>+<caption>ESP32-H2 functional block diagram</caption>
 </figure> </figure>
  
Line 67: Line 67:
  
 <figure esp32h2_devkitm> <figure esp32h2_devkitm>
-{{ :en:iot-open:hardware2:esp32-h2-devkitm-1_v1.2_callouts_20230303.png?nolink&400 |}}+{{ :en:iot-open:hardware2:esp32-h2-devkitm-1_v1.2_callouts_20230303.png?400 | ESP32-H2-DevkitM-1}}
 <caption>ESP32-H2-DevkitM-1</caption> <caption>ESP32-H2-DevkitM-1</caption>
 </figure> </figure>
  
  
en/iot-open/hardware2/esp32h.1700321362.txt.gz · Last modified: 2023/11/18 15:29 by pczekalski
CC Attribution-Share Alike 4.0 International
www.chimeric.de Valid CSS Driven by DokuWiki do yourself a favour and use a real browser - get firefox!! Recent changes RSS feed Valid XHTML 1.0