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en:iot-open:hardware2:esp32h [2023/11/08 18:09] – jpaduchen:iot-open:hardware2:esp32h [2024/05/27 11:09] (current) – [ESP32-H2] pczekalski
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-===ESP32-H2 General Information===+======ESP32-Hx Family====== 
 +{{:en:iot-open:czapka_b.png?50| General audience classification icon }}{{:en:iot-open:czapka_e.png?50| General audience classification icon }}\\ 
 +=====ESP32-H2=====
  
-ESP32-H2 is family of microcontrolers (SoC) that combines IEEE 802.15.4 connectivity with Bluetooth 5 (LE). The system does not have a Wi-Fi protocol but Thread and Zigbee protocols are available. ESP32-H2 has been certified as a “Zigbee-Compliant Platform” and has officially become a “Thread-Certified 1.3.0 Component”. The SoC is powered by a single-core, 32-bit RISC-V microcontroller that can be clocked up to 96 MHz. The ESP32-H2 has been designed especially for connected devices with low power consumption and security in mind. ESP32-H2 has 320 KB of SRAM with 16 KB of Cache, 128 KB of ROM, 4 KB LP of memory, and a built-in 2 MB or 4 MB SiP flash. It has 19 programmable GPIOs with support for ADC, SPI, UART, I2C, I2S, RMT, GDMA and LED PWM. +==ESP32-H2 General Information== 
-For now the ESP32-H2 family documentation is available as preliminary information only.+ 
 +ESP32-H2 is a family of microcontrollers (SoC) that combines IEEE 802.15.4 connectivity with Bluetooth 5 (LE). The system does not have a Wi-Fi protocol, but Thread and Zigbee protocols are available. ESP32-H2 has been certified as a “Zigbee-Compliant Platform” and has officially become a “Thread-Certified 1.3.0 Component”. The SoC is powered by a single-core, 32-bit RISC-V microcontroller that can be clocked up to 96 MHz. The ESP32-H2 has been designed especially for connected devices with low power consumption and security in mind. ESP32-H2 has 320 KB of SRAM with 16 KB of Cache, 128 KB of ROM, 4 KB LP of memory, and a built-in 2 MB or 4 MB SiP flash. It has 19 programmable GPIOs supporting ADC, SPI, UART, I2C, I2S, RMT, GDMA and LED PWM. 
 +For now, the ESP32-H2 family documentation is available as preliminary information only.
  
 == ESP32-H2 Architecture Overview == == ESP32-H2 Architecture Overview ==
-(Figure {{ref>esp32h2_functions}}) shows functional block diagram of ESP32-H2 chip. Main common features of the ESP32-H2 are ((https://www.espressif.com/sites/default/files/documentation/esp32-h2_datasheet_en.pdf)): +Figure {{ref>esp32h2_functions}} shows a functional block diagram of the ESP32-H2 chip. Main common features of the ESP32-H2 are ((https://www.espressif.com/sites/default/files/documentation/esp32-h2_datasheet_en.pdf)): 
  
 **Processors**  **Processors** 
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 **Wireless connectivity**  **Wireless connectivity** 
-    * **Bluetooth:** v5.0 Bluetooth Low Energy (BLE) ( speed: 125 Kbps - 2 Mbps) +    * **Bluetooth:** v5.0 Bluetooth Low Energy (BLE) ( speed: 125 Kbps - 2 Mbps), 
-    * ** 802.15.4-2015: ** up to 250 kbps; stacks includes Thread 1.3 , Zigbee 3.0 , Matter, HomeKit, MQTT+    * ** 802.15.4-2015: ** up to 250 kbps; stacks include Thread 1.3, Zigbee 3.0, Matter, HomeKit, MQTT.
  
 **Memory: Internal memory**  **Memory: Internal memory** 
-      * **Embedded flash**  2 or 4 MiB  +      * **Embedded flash**  2 or 4 MB,  
-      * **ROM:** 128 KiB (for booting and core functions). +      * **ROM:** 128 kB (for booting and core functions), 
-      * **SRAM:** 320 KiB (for data and instructions). +      * **SRAM:** 320 kB (for data and instructions), 
-      * **LP memory:** 4 KB of SRAM that can be accessed by the CPU. It can retain data in Deep-sleep mode +      * **LP memory:** 4 KB of SRAM that can be accessed by the CPU. It can retain data in deep sleep mode, 
-      * ** eFuse ** - 4 Kbit: 1792 bits are reserved for user data, such as encryption key and device ID+      * ** eFuse ** - 4 Kbit: 1792 bits are reserved for user data, such as encryption key and device ID.
  
 **Peripheral Input/Output**  **Peripheral Input/Output** 
-    * 19 x GPIO+    * 19 x GPIO,
     * 2 x 12-bit ADCs (analog-to-digital converter) up to 5 channels,     * 2 x 12-bit ADCs (analog-to-digital converter) up to 5 channels,
-    * Internal temperature sensor.+    * Internal temperature sensor,
     * 3 × SPI (Serial Peripheral Interface),      * 3 × SPI (Serial Peripheral Interface), 
     * 2 x UART (universal asynchronous receiver/transmitter),     * 2 x UART (universal asynchronous receiver/transmitter),
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 **Security**  **Security** 
-    *  Secure boot. +    *  Secure boot, 
-    *  Flash encryption. +    *  Flash encryption, 
-    *  4096-bit OTP, up to 1792-bit for customers.+    *  4096-bit OTP, up to 1792-bit for customers,
     *  Cryptographic hardware acceleration:     *  Cryptographic hardware acceleration:
       * AES-128/256,        * AES-128/256, 
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       * RSA accelerator 3072 bit,        * RSA accelerator 3072 bit, 
       * random number generator (RNG),       * random number generator (RNG),
-      * digital signature+      * digital signature.
  
 <note important>  <note important> 
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 <figure esp32h2_functions> <figure esp32h2_functions>
-{{ :en:iot-open:hardware2:esp32h2block.jpg?nolink&400 |}} +{{ :en:iot-open:hardware2:esp32h2block.jpg?400 | ESP32-H2 functional block diagram}} 
-<caption>ESP32-H2 functional block diagram </caption>+<caption>ESP32-H2 functional block diagram</caption>
 </figure> </figure>
  
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 <figure esp32h2_devkitm> <figure esp32h2_devkitm>
-{{ :en:iot-open:hardware2:esp32-h2-devkitm-1_v1.2_callouts_20230303.png?nolink&400 |}}+{{ :en:iot-open:hardware2:esp32-h2-devkitm-1_v1.2_callouts_20230303.png?400 | ESP32-H2-DevkitM-1}}
 <caption>ESP32-H2-DevkitM-1</caption> <caption>ESP32-H2-DevkitM-1</caption>
 </figure> </figure>
  
  
en/iot-open/hardware2/esp32h.1699466970.txt.gz · Last modified: 2023/11/08 18:09 by jpaduch
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