Espressif (SoC)

ESP32 is a low-cost, low-power system on a chip (SoC) series microcontrollers with Wi-Fi & dual-mode Bluetooth capabilities^[1]. ESP32 SoC is highly integrated with built-in antenna switches, power amplifier, low-noise receive amplifier, filters, and power management modules. Inside all family there is a single-core or dual-core Tensilica Xtensa LX6 microprocessor with a clock rate of up to 240 MHz. ESP32 is designed for mobile, wearable electronics, and Internet-of-Things (IoT) applications. It features all the state-of-the-art characteristics of low-power chips, including fine-grained clock gating, multiple power modes, and dynamic power scaling. For now the ESP32 family includes the following chips:

• ESP32-D0WDQ6 (Figure 1),
• ESP32-D0WD (Figure 2),
• ESP32-D2WD (Figure 3),
• ESP32-S0WD (Figure 4),
• ESP32-PICO-D4 - SiP (system in package) (Figure 5) - additionally contains crystal oscillator, 4MiB flash memory, filter capacitors and RF matching links.

Figure 1 ESP32 D0WD Q6	Figure 2 ESP32 D0WD
Figure 3 ESP32-D2WD	Figure 4 ESP32-S0WD
Figure 5 ESP32-PICO-D4

Figure 6 shows function block of ESP32 chip. diagram^. Main common features of the ESP32 are: ^{[2, 3]}

Processors:

• Main processor: Tensilica Xtensa 32-bit LX6 microprocessor
  • Cores: 2 or 1 (depending on variation) (All chips in the ESP32 series are dual-core except for ESP32-S0WD, which is single-core.)
  • Internal 8 Mhz oscillator with calibration
  • External 2 MHz to 60 MHz crystal oscillator (40 MHz only for Wi-Fi/BT functionality)
  • External 32 kHz crystal oscillator for RTC with calibration
  • Clock frequency: up to 240 MHz
  • Performance: up to 600 DMIPS
• Ultra low power co-processor: allows you to do ADC conversions, I2C connecting, computation, and level thresholds while in deep sleep.

Wireless connectivity:

• Wi-Fi: 802.11 b/g/n/e/i (802.11n @ 2.4 GHz up to 150 Mbit/s) with simultaneous Infrastructure BSS Station mode/SoftApp mode/Promiscuous mode,
• Bluetooth: v4.2 BR/EDR and Bluetooth Low Energy (BLE) with multi-connections Bt and BLE and simultaneous advertising and scanning capability,

Memory: Internal memory:

• ROM: 448 KiB (For booting and core functions)
• SRAM: 520 KiB (For data and instruction)
• RTC fast SRAM: 8 KiB (For data storage and main CPU during RTC Boot from the deep-sleep mode.)
• RTC slow SRAM: 8 KiB (For co-processor accessing during deep-sleep mode)
• eFuse: 1 Kibit (Of which 256 bits are used for the system (MAC address and chip configuration) and the remaining 768 bits are reserved for customer applications, including Flash-Encryption and Chip-ID. )
• Embedded flash: (Flash connected internally via IO16, IO17, SD_CMD, SD_CLK, SD_DATA_0 and SD_DATA_1 on ESP32-D2WD and ESP32-PICO-D4.)
  • 0 MiB (ESP32-D0WDQ6, ESP32-D0WD, and ESP32-S0WD chips)
  • 2 MiB (ESP32-D2WD chip)
  • 4 MiB (ESP32-PICO-D4 SiP module)
• External flash & SRAM: ESP32 supports up to four 16 MiB external QSPI flashes and SRAMs with hardware encryption based on AES to protect developers' programs and data. ESP32 can access the external QSPI flash and SRAM through high-speed caches.
• Up to 16 MiB of external flash are memory-mapped onto the CPU code space, supporting 8-bit, 16-bit and 32-bit access. Code execution is supported.
• Up to 8 MiB of external flash/SRAM memory are mapped onto the CPU data space, supporting 8-bit, 16-bit and 32-bit access. Data-read is supported on the flash and SRAM. Data-write is supported on the SRAM.

ESP32 chips with embedded flash do not support the address mapping between external flash and peripherals.
Peripheral input/output:

• Rich peripheral interface with DMA that includes capacitive touch (10x touch sensors),
• 12 -bit ADCs (analog-to-digital converter) up to 18 channels,
• 2 x 8 bit DACs (digital-to-analog converter),
• 2 x I²C (Inter-Integrated Circuit),
• 3x UART (universal asynchronous receiver/transmitter),
• CAN 2.0 (Controller Area Network),
• 4 x SPI (Serial Peripheral Interface),
• 2 x I²S (Integrated Inter-IC Sound),
• RMII (Reduced Media-Independent Interface),
• Motor PWM (pulse width modulation),
• LED PWM up to 16 channels,
• Hall sensor ,
• Internal temperature sensor.

Security:

• Secure boot
• Flash encryption
• IEEE 802.11 standard security features all supported, including WFA, WPA/WPA2 and WAPI
• 1024-bit OTP, up to 768-bit for customers
• Cryptographic hardware acceleration:
  • AES,
  • SHA-2,
  • RSA,
  • elliptic curve cryptography (ECC),
  • random number generator (RNG)

Figure 6 ESP 32 Function block diagram

The company also produces ready-made modules using the aforementioned processors. These modules combines ESP32 microcontroller and additional components mounted on PCB with EM shield:

• ESP32-WROOM-32 with 4MiB flash memory, and antenna on PCB. ( Figure 7)
• ESP32-WROOM-U with 4MIB flash memory and u.fl antenna conector, (Figure 8),
• ESP32-WROVER - with 4MiB flash memory, 4MiB pseudo static RAM and antenna on PCB (Figure 9)
• ESP32-WROVER-I - as ESP32-WROVER with additional u.fl antenna connector. (Figure 10)

Figure 7 ESP32-WROOM-32

Figure 8 ESP32-WROOM-U

Figure 9 ESP32-WROVER

Figure 10 ESP32-WROVER-I

To accelerate the design of circuits, developers can use specially prepared sets with ESP32 which are ready to use. The original Espressif best known small development boards are:

• ESP32-DevkitC ( Figure 11)
• ESP32-PICO-KIT-V4 (Figure 12)

Figure 11 ESP-32-DevkitC

Figure 12 ESP-32-PICO-KIT-V4