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en:iot-open:embeddedcommunicationprotocols2:spi [2023/11/21 20:04] – [SPI] pczekalski | en:iot-open:embeddedcommunicationprotocols2:spi [2024/05/27 10:16] (current) – [QSPI] ktokarz | ||
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====== SPI ====== | ====== SPI ====== | ||
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One of the most popular interfaces to connect different external devices is SPI (Serial Peripheral Interface). It is a synchronous serial interface and protocol that can transmit data with speeds up to 20 Mbps. SPI is used to communicate microcontrollers with one or more peripheral devices over short distances – usually internally in the device. High transmission speed enables SPI to be suitable even for sending animated video data to colourful displays. In SPI connection, there is always one master device, in most cases the microcontroller (μC) that controls the transmission, | One of the most popular interfaces to connect different external devices is SPI (Serial Peripheral Interface). It is a synchronous serial interface and protocol that can transmit data with speeds up to 20 Mbps. SPI is used to communicate microcontrollers with one or more peripheral devices over short distances – usually internally in the device. High transmission speed enables SPI to be suitable even for sending animated video data to colourful displays. In SPI connection, there is always one master device, in most cases the microcontroller (μC) that controls the transmission, | ||
<table RefTabSPI1> | <table RefTabSPI1> | ||
< | < | ||
- | ^ <fs xx-small> | + | ^ Line ^ Description ^ Direction ^ |
- | | <fs xx-small> | + | | MISO | Master In Slave Out | peripheral -> μC | |
- | | <fs xx-small> | + | | MOSI | Master Out Slave In | μC -> peripheral | |
- | | <fs xx-small> | + | | SCK | Serial Clock | μC -> peripheral | |
- | | <fs xx-small> | + | | SS | Slave Select | μC -> peripheral | |
</ | </ | ||
The MISO line is intended to send bits from slave to master, the MOSI wire transmits data from master to slave, and the SCK line sends clock pulses that synchronise data transmission. The master device always generates the clock signal. | The MISO line is intended to send bits from slave to master, the MOSI wire transmits data from master to slave, and the SCK line sends clock pulses that synchronise data transmission. The master device always generates the clock signal. | ||
Every SPI-compatible device has the SS (Slave Select) input that enables communication in this specific device. Master is responsible for generating this enable signal – separately for every slave in the system, as present in figure {{ref> | Every SPI-compatible device has the SS (Slave Select) input that enables communication in this specific device. Master is responsible for generating this enable signal – separately for every slave in the system, as present in figure {{ref> | ||
<figure RefSPIPic1> | <figure RefSPIPic1> | ||
- | {{ : | + | {{ : |
< | < | ||
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* communication interfaces (e.g. Ethernet, WiFi), | * communication interfaces (e.g. Ethernet, WiFi), | ||
* and many others. | * and many others. | ||
- | Due to different hardware implementations, | + | Due to different hardware implementations, |
<table RefSPITab2> | <table RefSPITab2> | ||
< | < | ||
- | ^ <fs xx-small> | + | ^ Mode ^ Clock polarity ^ Clock phase ^ Idle state ^ Active state ^ Output edge ^ Data capture ^ |
- | | <fs xx-small> | + | | mode 0 | 0 | 0 | 0 | 1 | falling | rising | |
- | | <fs xx-small> | + | | mode 1 | 0 | 1 | 0 | 1 | rising | falling | |
- | | <fs xx-small> | + | | mode 2 | 1 | 0 | 1 | 0 | rising | falling | |
- | | <fs xx-small> | + | | mode 3 | 1 | 1 | 1 | 0 | falling | rising | |
</ | </ | ||
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<figure RefSPIPic2> | <figure RefSPIPic2> | ||
- | {{ : | + | {{ : |
< | < | ||
</ | </ | ||
===== QSPI ===== | ===== QSPI ===== | ||
- | Even if a 20MHz frequency ensures good transmission speed, it can be too slow for some use. Some modern microcontrollers use external flash memory for program storage and execute programs from internal SRAM memory, downloading executable code in chunks as required. This requires a higher data rate to avoid stalls in program execution. A QSPI (Quad-SPI) link was developed to achieve higher transmission speed. It has four bidirectional data lines instead of two unidirectional to increase speed four times. Additionally, | + | Even if a 20MHz frequency ensures good transmission speed, it can be too slow for some use. Some modern microcontrollers use external flash memory for program storage and execute programs from internal SRAM memory, downloading executable code in chunks as required. This requires a higher data rate to avoid stalls in program execution. A QSPI (Quad-SPI) link was developed to achieve higher transmission speed. It has four bidirectional data lines instead of two unidirectional to increase speed four times (figure {{ref> |
- | < | + | < |
- | {{ : | + | {{ : |
< | < | ||
</ | </ | ||