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| en:multiasm:cs:chapter_3_8 [2025/12/05 08:57] – ktokarz | en:multiasm:cs:chapter_3_8 [2025/12/05 09:59] (current) – [Instruction Execution Process] ktokarz | ||
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| As we already mentioned, instructions are executed by the processor in a few steps. You can find in the literature descriptions that there are three, four, or five stages of instruction execution. Everything depends on the level of detail one considers. The three-stage description says that there are fetch, decode and execute steps. The four-stage model says that there are fetch, decode, data read and execute steps. The five-stage version adds another final step for writing the result back and sometimes reverses the steps of data read and execution. | As we already mentioned, instructions are executed by the processor in a few steps. You can find in the literature descriptions that there are three, four, or five stages of instruction execution. Everything depends on the level of detail one considers. The three-stage description says that there are fetch, decode and execute steps. The four-stage model says that there are fetch, decode, data read and execute steps. The five-stage version adds another final step for writing the result back and sometimes reverses the steps of data read and execution. | ||
| - | It is worth remembering that even a simple fetch step can be divided into a set of smaller actions which must be performed by the processor. The real execution of instructions depends on the processor' | + | It is worth remembering that even a simple fetch step can be divided into a set of smaller actions which must be performed by the processor. The real execution of instructions depends on the processor' |
| - Fetching the instruction: | - Fetching the instruction: | ||
| * The processor addresses the instruction by sending the content of the IP register on the address bus. | * The processor addresses the instruction by sending the content of the IP register on the address bus. | ||
