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en:multiasm:cs:chapter_3_5 [2025/12/02 13:03] – [SIMT] ktokarzen:multiasm:cs:chapter_3_5 [2025/12/02 13:28] (current) – [SIMT] ktokarz
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 ===== SIMT ===== ===== SIMT =====
-Single Instruction Multiple Threads. Originally defined as the subset of SIMD. The difference between SIMD and SIMT is that in pure SIMD, a single instruction performs operation on all elements of the vector in exactly the same way. In SIMT, selected threads can be activated or deactivated. Instructions and data are processed only on the active threads, while the data remains unchanged on inactive threads. +Single Instruction Multiple Threads. Originally defined as the subset of SIMD. The difference between SIMD and SIMT is that in pure SIMD, a single instruction operates on all elements of the vector in the same way. In SIMT, selected threads can be activated or deactivated. Instructions and data are processed only on the active threads, while the data remains unchanged on inactive threads. 
  
-In modern construction, Nvidia uses this execution model in their G80 architecture  +We can find SIMT in modern constructions. Nvidia uses this execution model in their G80 architecture  
-((https://www.nvidia.com/content/PDF/fermi_white_papers/NVIDIA_Fermi_Compute_Architecture_Whitepaper.pdf)) where multiple independent threads execute concurrently using a single instruction.  +((https://www.nvidia.com/content/PDF/fermi_white_papers/NVIDIA_Fermi_Compute_Architecture_Whitepaper.pdf))where multiple independent threads execute concurrently using a single instruction.  
-The new x64 vector instructions have masked variants, in which an operation can be turned on or off for selected vector elements.  +In x64 architecture, the new vector instructions have masked variants, in which an operation can be turned on or off for selected vector elements. This is done by an additional operand called a mask or predicates.
- +
-lanes according to the true/false values in an extra vector operand. This extra operand is called a "mask" because it functions like one: it "hides" certain vector lanes+
en/multiasm/cs/chapter_3_5.1764680624.txt.gz · Last modified: 2025/12/02 13:03 by ktokarz
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