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| en:multiasm:cs:chapter_3_4 [2025/12/02 10:11] – ktokarz | en:multiasm:cs:chapter_3_4 [2025/12/02 11:05] (current) – [Execution unit] ktokarz | ||
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| - If the instruction requires the execution unit operation, the control unit generates signals to control it. In cooperation with the execution unit, it can also read data from or write data to the memory. | - If the instruction requires the execution unit operation, the control unit generates signals to control it. In cooperation with the execution unit, it can also read data from or write data to the memory. | ||
| - | The control unit works according to the clock signal generator cycles known as main clock cycles. With every clock cycle, some internal operations are performed. One such operation is reading or writing the memory, which sometimes requires more than a single clock cycle. Single memory access is known as a machine cycle. As instruction execution sometimes requires more than one memory access and other actions, the execution of the whole instruction is named instruction cycle. Summarising, | + | The control unit works according to the clock signal generator cycles known as main clock cycles. With every clock cycle, some internal operations are performed. One such operation is reading or writing the memory, which sometimes requires more than a single clock cycle. Single memory access is known as a machine cycle. As instruction execution sometimes requires more than one memory access and other actions, the execution of the whole instruction is named an instruction cycle. Summarising, |
| The control unit also accepts input signals from peripherals, | The control unit also accepts input signals from peripherals, | ||
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| ===== Execution unit ===== | ===== Execution unit ===== | ||
| - | An execution unit, known also as the data processor executes instructions. Typically, it is composed of a few essential elements: | + | An execution unit, also known as the data processor, executes instructions. Typically, it is composed of a few essential elements: |
| * Arithmetic logic unit (ALU). | * Arithmetic logic unit (ALU). | ||
| * Accumulator and set of registers, | * Accumulator and set of registers, | ||
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| * Temporal register. | * Temporal register. | ||
| - | The arithmetic logic unit (ALU) is the element that performs logical and arithmetical calculations. It uses data coming from registers, the accumulator or from memory. Data coming from memory | + | The arithmetic logic unit (ALU) is the element that performs logical and arithmetical calculations. It uses data coming from registers, the accumulator or from memory. Data coming from memory for arithmetic and logic instructions |
| - | Besides the result, ALU also returns some additional information about the calculations. It modifies the bits in the flag register which comprises flags that indicate | + | Besides the result, ALU also returns some additional information about the calculations. It modifies the bits in the flag register, which comprises flags that are modified according to the results from arithmetic and logical operations. For example, if the result of the addition operation is too large to be stored in the resulting argument, the carry flag is set to indicate |
| - | Typically flags register | + | Typically, the flags register |
| * Carry flag, set in case a carry or borrow occurs. | * Carry flag, set in case a carry or borrow occurs. | ||
| * Sign flag, indicating whether the result is negative. | * Sign flag, indicating whether the result is negative. | ||
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| The flags are used as conditions for decision-making instructions (like //if// statements in some high-level languages). | The flags are used as conditions for decision-making instructions (like //if// statements in some high-level languages). | ||
| - | Flags register can also implement some control flags to enable/ | + | The flags register can also implement some control flags to enable/ |
| - | As we mentioned in the chapter about CISC and RISC processors in the first ones there are specialised | + | ===== Registers ===== |
| + | |||
| + | Registers are memory elements which are placed logically and physically very close to the arithmetic logic unit. It makes them the fastest memory in the whole computer. They are sometimes called scratch registers, and the set of registers is called the register file. | ||
| + | |||
| + | As we mentioned in the chapter about CISC and RISC processors, in CISC processors, registers | ||
| <figure CISCexeunit> | <figure CISCexeunit> | ||
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| </ | </ | ||
| - | A typical RISC execution unit does not have a specialised accumulator register. It implements the set of registers as shown in Fig {{ref> | + | A typical RISC execution unit does not have a specialised accumulator register. It implements the set of scratch |
| <figure RISCexeunit> | <figure RISCexeunit> | ||
