This content was implemented under the following project:

• Cooperation Partnerships in higher education, 2023, MultiASM: A novel approach for energy-efficient, high performance and compact programming for next-generation EU software engineers: 2023-1-PL01-KA220-HED-000152401.

Consortium Partners

• Silesian University of Technology, Gliwice, Poland (Coordinator),
• Riga Technical University, Riga, Latvia,
• Western Norway University, Forde, Norway,
• ITT Group, Tallinn, Estonia.

Erasmus+ Disclaimer
This project has been co-funded by the European Union.
Views and opinions expressed are, however, those of the author or authors only and do not necessarily reflect those of the European Union or the Foundation for the Development of the Education System. Neither the European Union nor the entity providing the grant can be held responsible for them.

Copyright Notice
This content was created by the MultiASM Consortium 2023–2026.
The content is copyrighted and distributed under CC BY-NC Creative Commons Licence and is free for non-commercial use.

In case of commercial use, please get in touch with MultiASM Consortium representative.

The art of efficient and compact-code assembler programming is considered to be a crucial skill in the context of many EU initiatives that are targeting to bring back to Europe processor design and manufacturing, as on the low-level it requires engineers aware of low-level programming methods, to correctly design processor architecture and development tools such as e.g. compilers.
Assembler programming is also the one giving the best control over hardware. Assembler programming brings the capability to include only essential code and thus generate compact software that is fast, limits resource use, and is energy efficient.

The document offers a curriculum for studies (see figure below) in the niche of unique skills in low-level programming and computer architectures, which are still urgently needed.
Currently, available digital devices have been classified as contained ones (such as embedded systems, IoT end nodes, smart sensors, etc.), mobiles (including recent notebooks, e.g. Apple and Microsoft, tablets, mobile phones, network equipment and fog class IoT devices) and PCs (all x86-based equipment, including notebooks, desktops and servers).
This split reflects the composition of the curriculum. One common module about computer architectures is for those who do not know the hardware concepts behind the construction of digital devices. Familiarising themselves with those concepts is necessary to understand low-level programming techniques. Further modules are designed to familiarise users with class-specific assembler programming using selected technology.

Each module has a separate syllabus and is composed of topics intended to be studied in the order in which they are presented. Some of those topics can also be used independently to let experienced users catch up with a particular piece of knowledge (topic).

An expected number of ECTS points for each module is presented below (figure 2):

• Computers Architecture (ECTS: 2),
• Programming in Assembler for IoT and Embedded Systems (ECTS: 4),
• Programming in Assembler for Mobiles and ARM (ECTS: 4),
• Programming in Assembler for PCs (ECTS: 4).

The following section delineates the architecture of the curriculum module in detail.

• Study level - provides the study level to which the module is designed for
• ECTS credits - how many points can be obtained for completing the module
• Study form - explains where the module can take place: class, online, or hybrid
• Module aims - gives the overall goal(s) or purpose(s) of the module
• Pre-requirements - outlines pre-requirements for the current module, which the student must meet
• Learning outcomes - lists what students are expected to know, understand, and be able to do after completing the module
• Topics - listed subjects taught in the module. They are based on the books that were made for the MultiASM project
• Type of assessment - a general description of how assessment is carried out in the module
• Blended learning - the module's overall framework and student tasks are described
• References to literature - list of books, online books, articles, etc are given, which helps to improve knowledge in the module
• Lab equipment - list of equipment, software, etc., used in the module to do laboratory work(s) locally
• Virtual lab - link(s) to a virtual lab(s), which is/are used in the module to do laboratory work(s) remotely
• MOOC course - provides a link to a massive open online course made for the MultiASM. Students from all over the world can attend it, and they are also the basics for blended and inverted learning models.

The MultiASM project delivers comprehensive learning and teaching materials for various stakeholders on low-level assembler programming for:

• constrained devices such as IoT end node devices (edge class), embedded systems, e.g. Atmel-based MCUs,
• mobile devices and IoT fog class devices, ARM-based, are also getting more and more popular among laptops (e.g. Apple's M-chips),
• PC computers (desktops, laptops, servers) based on Intel and AMD CPUs with x86/64 architecture.

In addition to the three modules listed above, an introductory module for computer architecture is offered. This module enables inexperienced users to gain the necessary knowledge to understand basic concepts of low-level programming.

The contents are available in a variety of forms:

• classical stationery for in-person meetings and presentations,
• remote for self-study in mass scale (MOOCs),
• remote for tutored study, also in blended learning model,
• and practical, particularly with the use of laboratory devices (limited to ARM).

The curriculum can be used as a whole course or a separate technology-related module. Once studied, students will obtain unique knowledge that is crucial for participation in EU-based activities, to bring chip, processor, and MCU design and manufacturing back to Europe. Modules can be used as a closed set of knowledge when studying from scratch or by experienced learners to recall/catch up with particular knowledge using selected topics, e.g. integration of the Assembler code and high-level languages.

Project results are composed of 4 main pillars (intellectual results, see figure below):

• A flexible IoT curriculum, presenting course-level organisation and individual module syllabi, is available as a PDF booklet and interactive website.
• Classical materials for in-person meetings with students, composed of:
  • sourcebook available in the classical and online form (with ISSN),
  • a set of PDF and textual materials for in-class DLP presentations.
• On-line materials for self-study and blended learning models:
  • online platform available to enrol students for self-study,
  • online raw materials (access to video recordings, learning curve documents and other materials, i.e. higher resolution images) to let anyone compose tutored courses based on these contents, tailored directly to their needs.
• Assembler Programming Live Lab - a remote access lab (available only to the consortium partners) to perform real programming experiments for ARM.

ARM processors are omnipresent, ranging from simple IoT devices to laptops, notebooks, and workstations.
For this reason, we had to select one technology to use for a practical introduction and experimentation.
To present both hardware interfacing and programming, the obvious choice is the Raspberry Pi. The following chapters present laboratory details and scenarios.

Assembler programming for embedded systems uses an integrated solution for IoT laboratories, namely VREL NextGen Software.
Users connect to the system using a web browser and develop software in the browser, compile it and inject it into the microcontroller, all remotely. Next, they use a web camera to observe the results.
The following chapters present more data on how to use the VREL NextGen remote labs system.

Each laboratory node is equipped with an Arduino Uno R3 development board, based on the ATmega328P MCU. It also has two extension boards:

• external, analogue and digital communication board,
• user interface board presented on the image 4.

There are 8 laboratory nodes. They can be used independently, but to present collaboration, nodes are interconnected symmetrically with GPIOs presented in a hardware reference section below

The table 1 lists all hardware components and details. Note that some elements are accessible, but their use is not supported via the remote lab, e.g., buttons and a buzzer.
The node is depicted in the figure 4.

Devices (laboratory nodes) are interconnected in pairs, so it is possible to work in groups and implement scenarios involving more than one device:

• node 1 with node 2,
• node 3 with node 4,
• node 5 with node 6,
• node 7 with node 8.

Interconnections are symmetrical, so that device 1 can send data to device 2 and vice versa (similar to serial communication). Note that analogue inputs are also involved in the interconnection interface. See image 5 for details.

The in-series resistors protect the outputs of the Arduino boards from excessive current when both pins are set as outputs with opposite logical states.

The capacitors on the analogue lines filter the PWM signal, providing a stable voltage for measurement by the analogue-to-digital converter.

Such a connection makes it possible to implement a variety of scenarios:

• Connection of OC0A to ADC5 allows you to generate a voltage for measuring on input 5 of the analogue-to-digital converter.
• Connection of OC1A to INT0 allows you to generate a digital periodic signal that can trigger hardware interrupts.
• Connection of OC1B to T1 allows you to generate a digital periodic signal, the pulse count of which can be counted using timer T1.